STM32F101RBT6 datasheet(34/101 Pages) STMICROELECTRONICS

34 / 101 page

Electrical characteristics

STM32F101x8, STM32F101xB

34/101

DocID13586 Rev 17

5.3.2

Operating conditions at power-up / power-down

Subject to general operating conditions for TA.

5.3.3

Embedded reset and power control block characteristics

The parameters given in Table 10 are derived from tests performed under the ambient

temperature and VDD supply voltage conditions summarized in Table 8.

VIN

I/O input voltage

Standard IO

–0.3

VDD + 0.3

FT IO(3)

2 V < VDD  3.6 V –0.3

5.5

VDD = 2 V

–0.3

5.2

BOOT0

5.5

Power dissipation at TA = 85 °C

(4)

LQFP100

434

LQFP64

444

LQFP48

363

UFQFPN48

624

VFQFPN36

1000

Ambient temperature

Maximum power dissipation

–40

°C

Low power dissipation(5)

–40

105

Junction temperature range

–40

105

1. When the ADC is used, refer to Table 41: ADC characteristics.

2. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV

between VDD and VDDA can be tolerated during power-up and operation.

3. To sustain a voltage higher than VDD+0.3 V, the internal pull-up/pull-down resistors must be disabled.

4. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Table 6.7: Thermal

characteristics on page 90).

5. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see

Table 6.7: Thermal characteristics on page 90).

Table 8. General operating conditions (continued)

Symbol

Parameter

Conditions

Min

Max

Unit

Table 9. Operating conditions at power-up / power-down

Symbol

Parameter

Conditions

Min

Max

Unit

tVDD

VDD rise time

rate

∞

µs/V

VDD fall time

rate

∞

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