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MP5026GLRT 데이터시트(PDF) 20 Page - Monolithic Power Systems |
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MP5026GLRT 데이터시트(HTML) 20 Page - Monolithic Power Systems |
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20 / 24 page ![]() MP5026 – 16V, 20A, 2.8mΩ RDS(ON), HOT-SWAP INTELLI-FUSE SOLUTION MP5026 Rev. 1.0 MonolithicPower.com 20 7/5/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. APPLICATION INFORMATION Selecting the Soft-Start Capacitor (CSS) A capacitor connected to SS (CSS) determines tSS. VOUT rises at a similar slew rate to the SS voltage (VSS). CSS can be calculated with Equation (7): SS SS SS t (ms) C (nF) = 9 R (M Ω) (7) Where RSS is 0.89MΩ. Place a 100nF capacitor between SS and GND to achieve a 9.9ms tSS. Selecting the IMON Resistor (RIMON) The MP5026 can monitor the power MOSFET current. Connect a resistor (RMON) to ground to set the output gain. The IMON current (IMON) can be calculated with Equation (8): IMON FET I I 20 μA/A = (8) Where IFET is the current flowing from the power MOSFET. The IMON reference voltage (VIMON) can be determined with Equation (9): = IMON IMON IMON V I R (9) Connect a 2k Ω resistor between IMON and GND to achieve a 40mV/A VIMON. Place a capacitor greater than 10nF between IMON and GND to smooth the indicator voltage. Do not float IMON. If not being used, connect IMON to GND. To ensure that the internal current-sense circuit has sufficient headroom, the maximum VIMON voltage should be below VCC - 1.5V (see Figure 11). 1 1.2 1.4 1.6 1.8 2 2 4 6 8 10 12 14 16 V IN (V) Figure 11: Maximum VIMON Range Selecting the ISET Resistor (RISET) The MP5026’s ILIMIT should exceed the normal maximum ILOAD, allowing for current-sense tolerances. ILIMIT can be calculated with Equation (10): 3 LIMIT ISET 0.3V I (A) 10 R (k Ω) = (10) Insertion Delay Time and OC Fault Timer Capacitor (CTMR) The MP5026’s TIMER pin provides two functions: tIDT and tOC. tIDT can be determined with Equation (11): = IDT TMR 1.21 t (ms) C (nF) 4 (11) tOC can be determined with Equation (12): = OC TMR 1.21 t (ms) C (nF) 40 (12) Place a 10nF capacitor between TIMER and GND to achieve a 3ms tIDT and 300µs tOC. |
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