| 전자부품 데이터시트 검색엔진 |
|
AX99100QI 데이터시트(PDF) 10 Page - ASIX Electronics Corporation |
|
|
|||||||||||||||||||||||||||||
AX99100QI 데이터시트(HTML) 10 Page - ASIX Electronics Corporation |
|
10 / 70 page ![]() 10 Copyright © 2016 ASIX Electronics Corporation. All rights reserved. AX99100 PCIe to Multi I/O Controller Table 1-2: PCIe Pin Description PCIe interface Pin Name Type Pin No Pin Description CLKN AI 20 PCIe PHY differential PLL reference clock. CLKP AI 19 PCIe PHY differential PLL reference clock. REXT AO 17 Bandgap External Resistor Connect this pin to ground through an external resistor of 20KΩ, ±1%. The total parasitic capacitor of this pin to ground must be less than 10 pF DIN AI 16 PCIe PHY differential negative serial data input. DIP AI 15 PCIe PHY differential positive serial data input. DOP AO 11 PCIe PHY differential positive serial data output. DON AO 12 PCIe PHY differential negative serial data output. WAKEn O5/T/4m 21 An open-drain, active low signal that is driven low by a PCI Express function to reactivate the PCI Express Link hierarchy’s main power rails and reference clocks. CLKREQn O5/T/4m 23 Reference clock request signal This pin is an open drain, active low signal that is driven low by the PCI Express Mini Card function to request that the PCI Express reference clock be available (active clock state) in order to allow the PCI Express interface to send/receive data. RSTn I5/PU/S/ 4m 24 Active low asynchronous reset from PCIe. Indicates when the applied main power is within the specified tolerance and stable. Table 1-3: Power/Ground Pin Description Power/Ground Pins Pin Name Type Pin No Pin Description VCCIO P 6, 26, 39, 55 Digital Power for I/O pins, 3.3V Please add a 0.1uF bypass capacitor between each VCCIO and GND. VCCK P 10, 22, 37, 57 Digital Power for core, 1.2V Please add a 0.1uF bypass capacitor between each VCCK and GND. GND P EPAD Ground for all Analog and Digital Power. VCC33A_REG P 36 Analog Power for Regulator, 3.3V VO12 P 35 1.2V Power Output of on-chip 3.3V to 1.2V Regulator. The regulator requires an external capacitor (at least 3.3 μF) with low ESR for frequency compensation and stability maintenance. VCC12A_TX P 13 Analog Power for PCIe Transmitter, 1.2V. Please add a 0.1 and 10 uF bypass capacitor between VCC12A_TX and GND. VCC12A_D P 14 Analog Power for PCIe Transceiver, 1.2V. Please add a 0.1 and 10 uF bypass capacitor between VCC12A_D and GND. VCC12A_AUX P 18 Analog Power for PCIe Auxiliary, 1.2V. Please add a 0.1 and 10 uF bypass capacitor between VCC12A_AUX and GND. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |