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TAS5802PWPR 데이터시트(PDF) 97 Page - Texas Instruments |
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TAS5802PWPR 데이터시트(HTML) 97 Page - Texas Instruments |
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97 / 106 page ![]() www.ti.com EXAMPLE BOARD LAYOUT 0.05 MAX ALL AROUND 0.05 MIN ALL AROUND 28X (1.5) 28X (0.45) 26X (0.65) (5.8) (R0.05) TYP (3.4) NOTE 9 (9.7) NOTE 9 (1.2) TYP (0.6) (1.2) TYP ( 0.2) TYP VIA (3.1) (4.05) PowerPAD TSSOP - 1.2 mm max height PWP0028M SMALL OUTLINE PACKAGE 4224480/A 08/2018 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004). 9. Size of metal pad may vary due to creepage requirement. 10. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 8X SYMM SYMM 1 14 15 28 METAL COVERED BY SOLDER MASK SOLDER MASK DEFINED PAD SEE DETAILS 15.000 METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL NON-SOLDER MASK SOLDER MASK DETAILS DEFINED (PREFERRED) SOLDER MASK DEFINED www.ti.com TAS5802 SLASFB7A – NOVEMBER 2024 – REVISED AUGUST 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 97 Product Folder Links: TAS5802 |
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