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IS25LP016D-RMLA3 데이터시트(PDF) 55 Page - Integrated Silicon Solution, Inc

부품명 IS25LP016D-RMLA3
상세설명  SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  115 Pages
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제조업체  ISSI [Integrated Silicon Solution, Inc]
홈페이지  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP016D-RMLA3 데이터시트(HTML) 55 Page - Integrated Silicon Solution, Inc

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IS25LP016D
IS25WP016D
Integrated Silicon Solution, Inc.- www.issi.com
55
Rev. B16
01/01/2025
8.19 WRITE FUNCTION REGISTER OPERATION (WRFR, 42h)
The Write Function Register (WRFR) instruction allows the user to disable dedicated RESET# pin or ball on 16-pin
SOIC or 24 ball TFBGA by setting Dedicated RESET# Disable bit to “1”. Also Information Row Lock bits
(IRL3~IRL0) can be set to “1” individually by WRFR instruction in order to lock Information Row.
Since Dedicated RESET# Disable bit and
IRL bits are OTP, once they are set to “1”, they cannot be set back to “0”
again
Figure 8.32 Write Function Register Sequence In SPI Mode
Instruction = 42h
CE #
SCK
SI
SO
Data In
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Mode 3
Mode 0
7
3
2
1
0
6
5
4
High Impedence
Figure 8.33 Write Function Register QPI Sequence In QPI Mode
42h
0
1
Mode 3
Mode 0
2
3
7:4
3:0
CE#
SCK
IO[3:0]
Data In



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