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L9823

Output Control register structure :

Power outputs characteristics

for flyback current, outputs short circuit protection and diagnostics

For output currents flowing into the circuit the output voltages are limited. The typical value of this voltage is 50V.

This function allows that the flyback current of a inductive load recirculates into the circuit; the flyback energy is

absorbed in the chip.

Output short circuit protection SFPD = Low (dedicated for loads without inrush current): when the output current

the output is switched off. The delay timer is started after each rise of CSB and valid datas are transfered to the

output control register. If the short takes place after the delay time has elapsed the shutdown is immediate (with-

in 15µs).

Output short circuit protection SFPD = High (dedicated for loads with inrush current, as lamps): when the load

current would exceed the short circuit limit value, the corresponding output goes in a current regulation mode.

The output current is determined by the output characteristics and the output voltage depends on the load re-

sistance. In this mode high power is dissipated in the output transistor and its temperature increases rapidly.

When the power transistor temperature exceeds the thermal shutdown threshold, the overload latch is set and

the corresponding output switched off.

For the load diagnostic in output off condition each output features a diagnostic current sink, of typ 60µA.

FUNCTIONAL DESCRIPTION

General

The L9823 integrated circuit features 8 power low-side-driver outputs. Data is transmitted to the device using

the Serial Peripheral Interface = SPI protocol. The power outputs features voltage clamping function for flyback

current recirculation and are protected against short circuit to Vbat.

The diagnostics recognizes two outputs fault conditions: 1) overcurrent and thermal overload in switch-ON con-

dition and 2) open load or short to GND in switch-OFF condition for all outputs. The outputs status can be read

out via the serial interface.

The chip internal Reset is a OR function of the external Reset signal and internally generated undervoltage Re-

set signal.

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

MSB

LSB

Control-bit output 7

Control-bit output 6

Control-bit output 5

Control-bit output 4

Control-bit output 3

Control-bit output 2

Control-bit output 1

Control-bit output 0