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ST7FLCD1 데이터시트(PDF) 25 Page - STMicroelectronics |
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ST7FLCD1 데이터시트(HTML) 25 Page - STMicroelectronics |
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25 / 95 page ![]() 25/95 ST7FLCD1 Interrupts The general sequence for clearing an interrupt is an access to the status register when the flag is set followed by a read or write of the associated register. Note that the clearing sequence resets the internal latch. A pending interrupt (i.e. waiting to be enabled) will therefore be lost if the Clear sequence is executed. Figure 10: Interrupt Processing Flowchart From Reset Execute Instruction Restore PC, X, A, CC from Stack Interrupt? N Y I Bit set? N Y Fetch Next Instruction Y N This clears I bit by default N Y IRET? Stack PC, X, A, CC Set I Bit Load PC from Interrupt Vector TRAP? |
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