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M25P10-AVMB3TP/Y 데이터시트(PDF) 18 Page - Numonyx B.V

부품명 M25P10-AVMB3TP/Y
상세설명  1 Mbit, serial Flash memory, 50 MHz SPI bus interface
PDF  51 Pages
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제조업체  NUMONYX [Numonyx B.V]
홈페이지  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

M25P10-AVMB3TP/Y 데이터시트(HTML) 18 Page - Numonyx B.V

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Instructions
M25P10-A
18/51
6.2
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 8) resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
●
Power-up
●
Write Disable (WRDI) instruction completion
●
Write Status Register (WRSR) instruction completion
●
Page Program (PP) instruction completion
●
Sector Erase (SE) instruction completion
●
Bulk Erase (BE) instruction completion
Figure 8.
Write Disable (WRDI) instruction sequence
C
D
AI03750D
S
Q
2
1
34567
High Impedance
0
Instruction



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