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AT25DF021A-DWFHT 데이터시트(PDF) 20 Page - Renesas Technology Corp

부품명 AT25DF021A-DWFHT
상세설명  2-Mbit, 1.65 V Minimum SPI Serial Flash Memory with Dual-I/O Support
PDF  59 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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DS-AT25DF021A-042 Rev. L
Page 20
8/7/23
© 2023 Renesas Electronics
AT25DF021A Datasheet
The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to
program properly. If a programming error arises, it is indicated by the EPE bit in the Status Register.
Figure 15. Sequential Program Mode – Status Register Polling
Figure 16. Sequential Program Mode – Waiting Maximum Byte Program Time
8.4
Page Erase
Page Erase for 2Mbit, 1024 Pages [ten (10) page address bits, PA<9:0>] of 256Bytes each.
The Page Erase command can be used to individually erase any page in the main memory array. The Main
Memory Byte/Page Program command can be used at a later time.
To perform a Page Erase with the standard page size (256 bytes), an opcode of 81h must be clocked into the
device followed by three address bytes comprised of:
Byte 0: 81h the page erase command code.
Byte 1: XXXX XX, PA9, PA8; which is six (6) dummy bits and two (2) page address bits.
Byte 2: PA<7:0>; which is eight (8) page address bits.
Byte 3: XXXX XXXX; which is eight (8) dummy bits.
When a low-to-high transition occurs on the CS pin, the device erases the selected page (the erased state is a
Logic 1). The erase operation is internally self-timed and should take place in a maximum time of tPE. During this
time, the RDY/BUSY bit in the Status Register indicates that the device is busy.
The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase
properly. If an erase error arises, it is indicated by the EPE bit in the Status Register.
CS
SI
SO
Opcode A23-16
A15-8
A7-0
05h
Data
High-Impedance
Opcode
Data
05h
04h
Opcode
Data
05h
STATUS REGISTER
DATA
STATUS REGISTER
DATA
STATUS REGISTER
DATA
Seqeuntial Program Mode
Command
First Address to Program
Status Register Read
Command
Write Disable
Command
Seqeuntial Program Mode
Command
Seqeuntial Program Mode
Command
Note: Each transition
shown for SI represents one byte (8 bits)
CS
SI
SO
Opcode A23-16
A15-8
A7-0
Data
High-Impedance
Opcode
Data
04h
Opcode
Data
Seqeuntial Program Mode
Command
First Address to Program
Write Disable
Command
Seqeuntial Program Mode
Command
Seqeuntial Program Mode
Command
Note: Each transition
shown for SI represents one byte (8 bits)
tBP
tBP
tBP



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