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M95256 데이터시트(PDF) 23 Page - STMicroelectronics |
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M95256 데이터시트(HTML) 23 Page - STMicroelectronics |
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23 / 43 page ![]() M95256, M95256-W, M95256-R Instructions 23/43 Figure 11. Page Write (WRITE) sequence 1. The most significant address bit (b15) is Don’t Care. 5.6.1 ECC (error correction code) and Write cycling The M95256, M95256-W and M95256-R devices offer an ECC (error correction code) logic which compares each 4-byte word with its associated 6 EEPROM bits of ECC. As a result, if a single bit out of 4 bytes of data happens to be erroneous during a Read operation, the ECC detects it and replaces it by the correct value. The read reliability is therefore much improved by the use of this feature. Note however that even if a single byte has to be written, 4 bytes are internally modified (plus the ECC bits), that is, the addressed byte is cycled together with the three other bytes making up the word. It is therefore recommended to write by word (4 bytes) in order to benefit from the larger amount of Write cycles. The M95256-W6 and M95256-R6 devices are qualified at 1 million (1 000 000) Write cycles, using a cycling routine that writes to the device by multiples of 4-byte words. C D AI01796D S 34 33 35 36 37 38 39 40 41 42 44 45 46 47 32 C D S 15 2 1 3456789 10 20 21 22 23 24 25 26 27 14 13 3210 28 29 30 Instruction 16-Bit Address 0 765432 0 1 Data Byte 1 31 43 765432 0 1 Data Byte 2 765432 0 1 Data Byte 3 65432 0 1 Data Byte N |
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