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SMS01GAF 데이터시트(PDF) 42 Page - Numonyx B.V

부품명 SMS01GAF
상세설명  64 MByte, 128 MByte, 256 MByte 512 MByte and 1 GByte, 3.3V Supply Secure Digital??Card
PDF  61 Pages
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제조업체  NUMONYX [Numonyx B.V]
홈페이지  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

SMS01GAF 데이터시트(HTML) 42 Page - Numonyx B.V

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Serial peripheral interface (SPI) mode
SMSxxxAF, SMSxxxFF, SMSxxxBF
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7
Serial peripheral interface (SPI) mode
The SPI mode is a secondary communication protocol, which is available in Flash memory-
based SD Memory Cards. The SD Memory Card SPI implementation uses a subset of the
SD Memory Card protocol and command set. The advantage of the SPI mode is the
capability of using off-the-shelf host, hence reducing the design-in effort to a minimum. The
disadvantage is the loss of performance (e.g., Single data line and hardware CS signal per
card). The SPI mode is selected during the first Reset command after power-up (CMD0)
and cannot be changed once the part is powered on.
7.1
SPI bus topology
The SPI compatible communication mode of the SD Memory Card is designed to
communicate with an SPI channel, commonly found in various microcontrollers on the
market. The SPI standard defines the physical link only, and not the complete data transfer
protocol. The SD Memory Card SPI and SD modes use the same command set.
Like all SPI devices, the SD Memory Card SPI channel uses the four following signals:
●
CS: Host to card Chip Select signal.
●
CLK: Host to card clock signal
●
DataIn: Host to card data signal.
●
DataOut: Card to host data signal.
All data tokens are multiples of Bytes (8 bits) and always Byte-aligned to the CS signal. The
card identification and addressing methods are replaced by a hardware Chip Select (CS)
signal. There are no broadcast commands. For every command, a card (slave) is selected
by asserting (active Low) the CS signal (see Figure 31: SD Memory Card System SPI Mode
Bus Topology).The CS signal must be continuously active for the duration of the SPI
transaction. The only exception occurs during card programming, when the host can de-
assert the CS signal without affecting the programming process. The SPI interface uses 7
out of the 9 SD signals (DAT1 and DAT2 are not used, DAT3 is the CS signal) of the SD bus.



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