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SMS01GAF 데이터시트(PDF) 48 Page - Numonyx B.V

부품명 SMS01GAF
상세설명  64 MByte, 128 MByte, 256 MByte 512 MByte and 1 GByte, 3.3V Supply Secure Digital??Card
PDF  61 Pages
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제조업체  NUMONYX [Numonyx B.V]
홈페이지  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

SMS01GAF 데이터시트(HTML) 48 Page - Numonyx B.V

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Serial peripheral interface (SPI) mode
SMSxxxAF, SMSxxxFF, SMSxxxBF
48/61
7.4.2
R1b Format
This response token is similar to the R1 Format response token but for the option of adding
the busy signal.
The busy signal token can be any number of Bytes. A zero value indicates that the card is
busy. A non-zero value indicates that the card is ready for the next command.
7.4.3
R2 Format
This response token is two Bytes long. It is sent as a response to the SEND_STATUS
command.
7.4.4
R3 Format
This response token is sent by the card when a READ_OCR command is received. The
response length is 5 Bytes. The structure of the first Byte is identical to that of the R1 Format
response. The other four Bytes contain the OCR register.
For more details about responses, please refer to the SD Memory Card Specification v.1.01.
7.5
Clearing Status Bits
In the SPI mode, as described in the previous paragraphs, status bits are reported to the
host in three different formats: R1 Format response, R2 Format response and data error
token (the same bits may exist in several response types - e.g. Card ECC failed).
As in the SD mode, error bits are cleared when read by the host, regardless of the response
format.
State indicators are cleared either when read by the host or in accordance with the card
state. For more details, please refer to the SD Memory Card Specification.
7.6
SPI Bus Timings
Figure 38 illustrates the basic Command/Response transaction in SPI mode (that is, when
the card is ready).
Figure 39 describes a Command/ Response transaction when the card is busy (R1b
response format). For timings, refer to Table 25.
Table 28.
SPI Timing Symbols
S
Start Bit (=0)
T
Transmitter Bit (Host = 1, Card = 0)
P
One-Cycle Pull-up (=1)
E
End Bit (= 1)
Z
High impedance stage
D
Data Bits
*
Repeater



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