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TMS320DM643 데이터시트(PDF) 79 Page - Texas Instruments |
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TMS320DM643 데이터시트(HTML) 79 Page - Texas Instruments |
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79 / 162 page ![]() www.ti.com AECLKOUT2 17 14 1 CLKOUT4 CLKOUT6 RESET AECLKIN Z Group(A)(B) Boot and Device Configuration Inputs(C) 16 15 3 2 10 8 EMIF Z Group(A)(B) EMIF High Group(A) EMIF Low Group(A) 11 9 7 6 AECLKOUT1 5 4 A. EMIF Z group consists of: AEA[22:3], AED[63:0], ACE[3:0], ABE[7:0], AARE/ASDCAS/ASADS/ASRE, AAWE/ASDWE/ASWE, and AAOE/ASDRAS/ASOE, ASOE3, ASDCKE, and APDT. EMIF high group consists of: AHOLDA (when the corresponding HOLD input is high) EMIF low group consists of: ABUSREQ; AHOLDA (when the corresponding HOLD input is low) Z group consists of: HD[31:0] and the muxed EMAC output pins, MDCLK, MDIO, CLKX0, FSX0, DX0, CLKR0, FSR0, TOUT0, TOUT1, VDAC/GP0[8], GP0[13, 11, 10, 7:0], HR/W, HDS2, HDS1, HCS, HCNTL1, HAS, HCNTL0, HHWIL (16-bit HPI mode only), HRDY, HINT, VP1D[19:0], and VP2D[19:0]. B. If AEA[22:19], LENDIAN, and HD5 pins are actively driven, care must be taken to ensure no timing contention between parameters 6, 7, 14, 15, 16, and 17. C. Boot and Device Configurations Inputs (during reset) include: AEA[22:19], LENDIAN, and HD5. TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269C – FEBRUARY 2005 – REVISED JANUARY 2007 Figure 5-11. Reset Timing Submit Documentation Feedback DM643 Peripheral Information and Electrical Specifications 79 |
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