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TDA7500A 데이터시트(PDF) 15 Page - STMicroelectronics

부품명 TDA7500A
상세설명  DIGITAL AM/FM SIGNAL PROCESSOR
PDF  40 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

TDA7500A 데이터시트(HTML) 15 Page - STMicroelectronics

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TDA7500A
PIN CONNECTION (Top view)
RECOMMENDED DC OPERATING CONDITIONS
POWER CONSUMPTION
Note: 45MHz internal DSP clock, 4ADC and 6DAC enabled.
PLL CHARACTERISTICS
Note: 1. Depending on VCO output frequency.
2. Fdsp = Fvco/2 when PLL is running
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VDD
3.3V Digital Power Supply Voltage
3.15
3.3
3.45
V
VCC
3.3V Analog Power Supply Voltage
3.15
3.3
3.45
V
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Idd
Total Maximum Current
power supply @ 3.3V and Tj = 125°C
450
490
mA
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Lock Time (note1)
power supply @ 3.3V and Tj = 125°C
3ms
FVCO
VCO Frequency (note 2)
70
140
MHz
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
TESTEN
TESTSE
NRESET
SCKM
MOSIM
MISOM
SSM
SCKD
MOSID
MISOD
SSD
AVDD
XTI
XTO
CLKIN
AGND
RDSINT
RDSARI_SCK
RDSDAT_SI
RDSQAL_SO
RDSCLK_SS
INT
CGND1
DBCK0OS01
DBIN0OS00
DBOUT0
DBRQN1
DBCK1_OS11
DBIN1_OS10
DBOUT1
LRCKR
SCKR
LRCKT
SCKT
SDI0
SDI1/SRA<21>/RAS
SDI2 / SRA<20>
SDO0 / SRA<19>
SDO1 / SRA<18>
SDO2 / SRA<17>
CASALE
DRD
DWR
SRA<15>
SRA<14>
SRA<13>
CVDD2
SRA<16>
DSP0 GPIO0
DSP0 GPIO2
DSP0 GPIO1
DSP0 GPIO3
DSP0 GPIO4
DSP0 GPIO6
DSP0 GPIO5
DSP0 GPIO7
DSP1 GPIO4
DSP1 GPIO3
DSP1 GPIO1
DSP1 GPIO2
DSP1 GPIO0
DSP0 GPIO9
DSP0 GPIO11
DSP0 GPIO10
DSP0 GPIO8
DSP1 GPIO5
DSP1 GPIO6
DSP1 GPIO7
DSP1 GPIO8
DSP1 GPIO9
DSP1 GPIO11
DSP1 GPIO10
SRCCDC
CODEC
Test
IIC/SPI master
SPI display
PLL oscillator
RDS
SPDIF
EMI
SAI
Debug DSP1
Debug DSP0
GND1
VDD1
EMI
SPDIF
OD
OD
OD
OD
OD
OD: 5V tolerant Open Drain Output



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