PDSP1601/PDSP1601A

14

TYPICAL APPLICATION

Select a 16 bit field from each word in a block of 32 bit

words with a 10MHz throughput.

The 16 bit field indicated is to be selected from each 32 bit

word.

(2)

The LS byte is logically right shifted, n-places, the

LSBs being discarded and the MSBs being filled with zeros.

This shifted data is loaded into the shifter register file left

register.

During this cycle the previous contents of this register are

passed through the ALU to the ALU register file left register.

(3)

While the MS byte of the next 32 bit word is shifted in

the Barrel Shifter, the two previous results, resident within the

left registers of the ALU and Shifter Register files are 'ORed'

by the ALU, the result being the desired 16 bit field is loaded

into the ALU register file right register ready to be output on the

next cycle.

The instructions from initialisation are given in Table 6.

8

8

8

8

MS Byte

LS Byte

MS Bit

16 bits

nbits

The 32 bit words are fed into the B port of the PDSP1601

in two cycles, MS byte first.

The PDSP1601 shift control is initiated by programming

the R1 and R2 registers with n and 16-n respectively.

The shift operation is implemented in three steps:-

(1)

The MS byte is logically left shifted (16-n) places, the

MSBs being discarded and the LSB spaces being filled with

zeros. This shifted data is loaded into the shifter register file

left register.

CLK

1/

2/

3/

4/

5/

6/

7/

8/

CEB

1

1

0

0

0

0

0

0

MSA

MARSX

MARSX

MARSX

MARSX

MARSX

MARAX

MARSX

MARAX

MSB

1

1

1

1

1

1

1

1

MSS

0

0

0

0

0

0

0

0

MSC

0

0

0

0

0

0

0

0

IA

CLRXX

PASXA

PASXA

PASXA

PASXA

ORXAB

PASXA

ORXAB

IS

X

LR1SV

LR2SV

LSLR2

LSRR1

LSLR2

LSRR1

LSLR2

SV

X

n

(16-n)

X

X

X

X

X

RA

NOPLR

NOPLR

NOPLR

NOPLR

LLRRR

LRRLR

LLRRR

LRRLR

RS

NOPLR

NOPLR

NOPLR

LLRLR

LLRLR

LLRLR

LLRLR

LLRLR

Comment

Clear

Load R1 with n

Load R2 with (16-n)

Shift 1st MS byte

Shift 1st LS byte

OR 1st bytes and

shift 2nd MS byte

Shift 2nd LS byte

and output first result

Shift 3rd LS byte

Repeat instruction pair 5/ and 6/ until all 16 bit fields have been selected.

Table 6

Supply voltage Vcc

-0.5V to 7.0V

Input voltage V

IN

-0.9 to Vcc + 0.9V

Output voltage V

OUT

-0.9 to Vcc + 0.9V

Clamp diode current per pin Ik (see note 2)

±18mA

Static discharge voltage (HMB)

500V

Storage temperature T

S

-65°C to +150°C

Ambient temperature with

power applied T

amb

Military

-40°C to +125°C

Industrial

-40°C to +85°C

AC

1000mw

LC

1000mw

NOTES

1. Exceeding these ratings may cause permanent damage.

Functional operation under these conditions is not implied.

2. Maximum dissipation or 1 second should not be exceeded, only

one output to be tested at any one time.

THERMAL CHARACTERISTICS

Package type

AC

12

36

LC

12

35