| 전자부품 데이터시트 검색엔진 |
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LXT362 데이터시트(PDF) 19 Page - Intel Corporation |
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LXT362 데이터시트(HTML) 19 Page - Intel Corporation |
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19 / 48 page ![]() Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Datasheet 19 . Figure 4. Serial Port Data Structure Table 5. Control and Operational Mode Selection Input to Pin1 Mode of Operation Mode TRSTE Hardware Host2 Unipolar Bipolar AMI Enc/Dec B8ZS Encoder/Decoder All Outputs Tristated Low Low On Off Off On Off3 Off No Low High On Off Off On Off3 Off Yes Low Open On Off On Off On Off No High Low Off On x x x x No High High Off On x x x x Yes High Open Off On x x x x No Open Low On Off On Off Off On No Open High On Off On Off Off On Yes Open Open On Off On Off Off On No 1. Open is either a midrange voltage or the pin is floating. 2. In Host mode, the contents of register CR1 determine the operation mode. 3. Encoding is done externally. R/W A1 A2 A3 A4 A5 A6 A7 (don’t care) CS SCLK SDI R/W = 1: Read operation R/W = 0: Write operation (SDO remains high impedance) Address / Command Byte D0 D1 D2 D3 D4 D5 D6 D7 Input (Write) Data Byte D0 D1 D2 D3 D4 D5 D6 D7 Output (Read) Data Byte SDO High Impedance |
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