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JS48F4400P0P3C0 데이터시트(PDF) 71 Page - Numonyx B.V

부품명 JS48F4400P0P3C0
상세설명  StrataFlash짰 Cellular Memory
PDF  139 Pages
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제조업체  NUMONYX [Numonyx B.V]
홈페이지  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

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April 2008
Datasheet
309823-10
71
Numonyx™ StrataFlash® Cellular Memory (M18)
8.0
NOR Flash Bus Interface
The flash device uses low-true control signal inputs, and is selected by asserting the
chip enable (CE#) input. The output enable (OE#) input is asserted for read
operations, while the write enable (WE#) input is asserted for write operations. OE#
and WE# should never be asserted at the same time; otherwise, indeterminate device
operation will result. All bus cycles to or from the flash memory conform to standard
microcontroller bus cycles.
Commands are written to the device to control all operations.
Table 27 shows the logic levels that must be applied to the control-signal inputs of the
device for the various bus operations.
Notes:
1.
X = Don’t care (High or Low)
2.
DPD polarity determined by ECR14. Shown low-true here.
8.1
Bus Reads
To perform a read operation, both CE# and OE# must be asserted; #RST# and WE#
must be deasserted. OE# is the data-output control and when asserted, the output
data is driven on to the data I/O bus. All read operations are independent of the
voltage level on VPP.
The Automatic Power Savings (APS) feature provides low power operation following
reads during active mode. After data is read from the memory array and the address
lines are quiescent, APS automatically places the device into standby. In APS, device
current is reduced to ICCAPS.
The device supports two read configurations:
• Asynchronous reads. RCR15 = 1. This is the default configuration after power-up/
reset.
— Non-multiplexed devices support asynchronous page-mode reads. AD-
Multiplexed devices support only asychronous single-word reads.
• Synchronous Burst reads. RCR15 = 0.
Table 27: Flash Memory Control Signals
Operation
RST#
DPD2
CE#1
OE#1
WE#1
Address1
Data I/O
Reset
Low
High
X
X
X
X
High-Z
Read
High
High
Low
Low
High
Valid
Output
Output Disable
High
High
Low
High
High
X
High-Z
Write
High
High
Low
High
Valid
Input
High
High
High
Low
Valid
Input
Standby
High
High
High
X
X
X
High-Z
Deep Power-Down
High
Low
High
X
X
X
High-Z



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