F24 datasheet(64/210 Pages) RENESAS

64 / 210 page

RL78/F23, F24

3. ELECTRICAL SPECIFICATIONS (GRADE 3)

R01DS0446EJ0120 Rev.1.20

Page 64 of 207

Dec 31, 2025

3.5 Peripheral Functions Characteristics

3.5.1 RAM can be written to Serial Array Unit

(1)

During communication at same potential (UART mode) (dedicated baud rate generator output)

(TA = -40 to +105

°C, 2.7 V ≤ EVDD0 = EVDD1 = VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Transfer rate

–

fMCK/6

bps

fCLK = 40 MHz,

fMCK = fCLK

Normal slew rate

6.6

Mbps

Special slew rate

Mbps

UART mode connection diagram (during communication at same potential)

UART mode bit width (during communication at same potential) (reference)

Caution Select the normal input buffer for the RXD0 pin and RXD1 pin and normal output mode for the TXD0

pin and TXD1 pin.

Remark fMCK: Serial array unit operation clock frequency

User's device

RL78

microcontroller

TXD0, TXD1

RXD0, RXD1

Baud rate error tolerance

1/Transfer rate

High-/low-bit width

TXD0, TXD1

RXD0, RXD1

F24 데이터시트(PDF) 64 Page - Renesas Technology Corp

F24 데이터시트(HTML) 64 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL