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RA2L2 데이터시트(PDF) 6 Page - Renesas Technology Corp |
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RA2L2 데이터시트(HTML) 6 Page - Renesas Technology Corp |
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6 / 108 page ![]() 1.2 Block Diagram Figure 1.1 shows a block diagram of the MCU superset. Some individual devices within the group have a subset of the features. Memory 128 KB code flash 4 KB data flash 16 KB SRAM DMA System Mode control Power control ICU MOSC/SOSC Clocks (H/M/L) OCO GPT32 × 1 GPT16 × 6 Timers AGTW × 2 RTC KINT Arm Cortex-M23 NVIC System timer Test and DBG Interface DTC WDT/IWDT CAC POR/LVD Reset ELC Event link TRNG Security Analogs CRC Data processing DOC Communication interfaces I3C × 1 SPI × 1 SCI × 4 TSN ADC12 MPU Bus MPU Register write protection CAN × 1 USBCC × 1 UARTA × 2 USBFS × 1 SSIE × 1 Note: Not available on all parts Figure 1.1 Block diagram 1.3 Part Numbering Figure 1.2 shows the product part number information, including memory capacity and package type. Table 1.11 shows a list of products. RA2L2 Datasheet 1. Overview R01DS0445EJ0120 Rev.1.20 Jun 9, 2026 Page 6 of 108 |
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