RX72N datasheet(52/179 Pages) RENESAS

52 / 179 page

RX72N Group

1. Overview

R01DS0343EJ0120 Rev.1.20

Page 52 of 179

Nov 15, 2023

Note 1. P53 is multiplexed with the BCLK pin function, so cannot be used as an I/O port pin when the external bus is enabled.

P13

WR2#/BC2# MTIOC0B/

TIOCA5/

TMO3/PO13

GTADSM1 TXD2/

SMOSI2/

SSDA2/

SDA0[FM+]

LCD_TCO

N0-A

IRQ3

ADTRG1#

USB0_DM

USB0_DP

CLKOUT2

P56

EDACK1

MTIOC3C/

TIOCA1

SCK7/

RSPCKC-B

LCD_DAT

A4-A

P11

MTIC5V/

TMCI3

SCK2

EPLSOUT1

LCD_DAT

A7-A

IRQ1

P53*1

BCLK

R10

VSS

R11

VCC

R12

P80

EDREQ0

MTIOC3B/

PO26

SCK10/

RTS10#

ET0_TX_E

RMII0_TXD

_EN

QIO2-A/

SDHI_WP/

MMC_D2-A

LCD_DAT

A14-A

R13

P76

CS6#

PO22

SMISO11/

SSCL11/

RXD11

ET0_RX_C

LK/

REF50CK0

QSSL-A/

SDHI_CMD-A/

MMC_CMD-A

LCD_DAT

A18-A

R14

P74

A20/CS4#

PO19

SS11#/

CTS11#

ET0_ERXD

RMII0_RX

LCD_DAT

A21-A

R15

PC1

A17

MTIOC3A/

TCLKD/PO18

SCK5/

SSLA2-A

ET0_ERXD

LCD_DAT

A22-A

IRQ12

Table 1.6

List of Pin and Pin Functions (176-Pin LFBGA) (9/9)

Number

Power

Supply

Clock

System

Control

I/O Port

Bus

EXDMAC

SDRAMC

Timer

Communication

Memory I/F

Camera I/F

GLCDC

Interrupt

A/D

D/A

176-Pin

LFBGA

(MTU, TPU,

TMR, PPG,

RTC, CMTW,

POE, CAC)

(GPTW,

POEG)

(SCI, RSPI,

RIIC, CAN,

USB, SSIE)

(ETHERC,

PMGI)

(QSPI, SDHI,

MMCIF, PDC)

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