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WM8951L 데이터시트(PDF) 11 Page - Wolfson Microelectronics plc |
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WM8951L 데이터시트(HTML) 11 Page - Wolfson Microelectronics plc |
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11 / 42 page ![]() Production Data WM8951 w PD Rev 4.1 December 2007 11 DIGITAL AUDIO INTERFACE – SLAVE MODE Figure 5 Slave Mode Connection Figure 6 Digital Audio Data Timing – Slave Mode Test Conditions AVDD1, AVDD2, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25 oC, Slave Mode, fs = 48kHz, XTI/MCLK = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Audio Data Input Timing Information BCLK cycle time tBCY 50 ns BCLK pulse width high tBCH 20 ns BCLK pulse width low tBCL 20 ns ADCLRC set-up time to BCLK rising edge tLRSU 10 ns ADCLRC hold time from BCLK rising edge tLRH 10 ns ADCDAT propagation delay from BCLK falling edge tDD 0 15 ns BCLK ADCDAT ADCLRC WM8951 ADC DSP ENCODER/ DECODER BCLK ADCLRC t BCH t BCL t BCY ADCDAT t LRSU t LRH t DD |
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