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ADG526ATCHIPS 데이터시트(PDF) 8 Page - Analog Devices

부품명 ADG526ATCHIPS
상세설명  CMOS Latched 8-/16-Channel Analog Multiplexers
PDF  20 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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ADG526ATCHIPS 데이터시트(HTML) 8 Page - Analog Devices

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ADG526A/ADG527A
Rev. C | Page 8 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VDD 1
NC
2
RS
3
S16
4
D
28
VSS
27
S8
26
S7
25
S15
5
S6
24
S14
6
S5
23
S13
7
S4
22
S12
8
S3
21
S11
9
S2
20
S10 10
S1
19
S9 11
EN
18
GND 12
A0
17
WR 13
A1
16
A3 14
A2
15
NC = NO CONNECT
ADG526A
TOP VIEW
(Not to Scale)
Figure 3. ADG526A PDIP, SOIC, and CERDIP Pin Configuration
128
27
26
2
3
4
5
6
7
8
9
10
11
25
24
23
22
21
20
19
NC = NO CONNECT
S15
S14
S13
S12
S11
S10
S09
S7
S6
S5
S4
S3
S2
S1
PIN 1
IDENTFIER
12
13
14
15
16
17
18
ADG526A
TOP VIEW
(Not to Scale)
Figure 4. ADG526A PLCC Pin Configuration
Table 4. ADG526A Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VDD
Most Positive Power Supply Potential.
2
NC
No Connect.
3
RS
Reset. The RS signal clears both the address and enable data in the latches resulting in no output (all switches off ).
4
S16
Source Terminal. This pin can be an input or output.
5
S15
Source Terminal. This pin can be an input or output.
6
S14
Source Terminal. This pin can be an input or output.
7
S13
Source Terminal. This pin can be an input or output.
8
S12
Source Terminal. This pin can be an input or output.
9
S11
Source Terminal. This pin can be an input or output.
10
S10
Source Terminal. This pin can be an input or output.
11
S9
Source Terminal. This pin can be an input or output.
12
GND
Ground (0 V) Reference.
13
WR
Write. The WR signal latches the state of the address control lines and the enable line.
14
A3
Logic Control Inputs. Selects which source terminal is connected to the drain (D).
15
A2
Logic Control Inputs. Selects which source terminal is connected to the drain (D).
16
A1
Logic Control Inputs. Selects which source terminal is connected to the drain (D).
17
A0
Logic control inputs. Selects which source terminal is connected to the drain (D).
18
EN
Enable. Active high logic control input.
19
S1
Source Terminal. This pin can be an input or output.
20
S2
Source Terminal. This pin can be an input or output.
21
S3
Source Terminal. This pin can be an input or output.
22
S4
Source Terminal. This pin can be an input or output.
23
S5
Source Terminal. This pin can be an input or output.
24
S6
Source Terminal. This pin can be an input or output.
25
S7
Source Terminal. This pin can be an input or output.
26
S8
Source Terminal. This pin can be an input or output.
27
VSS
Most Negative Power Supply Potential.
28
D
Drain Terminal. This pin can be an input or output.



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