ADG526A/ADG527A

Rev. C | Page 12 of 20

TERMINOLOGY

Ohmic resistance between Terminal D and Terminal S.

Source terminal leakage current when the switch is off.

Drain terminal leakage current when the switch is off.

Leakage current that flows from the closed switch into the body.

Analog voltage on Terminal S or Terminal D.

Channel input capacitance for off condition.

Channel output capacitance for off condition.

Digital input capacitance.

Delay time between the 50% and 90% points of the digital input

and switch on condition.

Delay time between the 50% and 10% points of the digital input

and switch off condition.

Delay time between the 50% and 90% points of the digital

inputs and switch on condition when switching from one

address state to another.

Off time measured between 50% points of both switches when

switching from one address state to another.

Maximum input voltage for Logic 0.

Minimum input voltage for Logic 1.

Input current of the digital input.

Most positive voltage supply.

Most negative voltage supply.

Positive supply current.

Negative supply current.