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74HC30PW 데이터시트(PDF) 7 Page - Nexperia B.V. All rights reserved

부품명 74HC30PW
상세설명  8-input NAND gate
PDF  15 Pages
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74HC_HCT30
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 7 — 2 December 2015
7 of 15
NXP Semiconductors
74HC30; 74HCT30
8-input NAND gate
[1]
tpd is the same as tPHL and tPLH.
[2]
tt is the same as tTHL and tTLH.
[3]
CPD is used to determine the dynamic power dissipation (PD in W):
PD =CPD  VCC2  fi  N+  (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
 (C
L  VCC
2
 f
o) = sum of outputs.
11. Waveforms
CPD
power dissipation
capacitance
per package; VI =GND to VCC
[3]
-15-
-
-
pF
74HCT30
tpd
propagation delay
A, B, C, D, E, F, G, H to Y;
see Figure 5
[1]
VCC = 4.5 V
-
16
28
35
42
ns
VCC = 5.0 V; CL =15pF
-
12
-
-
-
ns
tt
transition time
VCC = 4.5 V; see Figure 5
[2]
-
7
15
19
22
ns
CPD
power dissipation
capacitance
per package;
VI =GND to VCC  1.5 V
[3]
-15-
-
-
pF
Table 7.
Dynamic characteristics …continued
GND = 0 V; CL = 50 pF; for test circuit see Figure 6.
Symbol Parameter
Conditions
25
C
40 C to +125 C Unit
Min
Typ
Max
Max
(85
C)
Max
(125
C)
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Input to output propagation delays and output transition times
Table 8.
Measurement points
Type
Input
Output
VM
VM
VX
VY
74HC30
0.5VCC
0.5VCC
0.1VCC
0.9VCC
74HCT30
1.3 V
1.3 V
0.1VCC
0.9VCC



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