NRF52811-QCAA-R datasheet(140/444 Pages) NORDIC

140 / 444 page

Peripherals

Instance

Channel

Number of channels

PPI

0-19

PPI (fixed)

20-31

Table 47: Configurable and fixed PPI channels

The PPI provides a mechanism to automatically trigger a task in one peripheral as a result of an event

occurring in another peripheral. A task is connected to an event through a PPI channel. The PPI channel

is composed of three end point registers, one EEP and two TEPs. A peripheral task is connected to a TEP

using the address of the task register associated with the task. Similarly, a peripheral event is connected to

an EEP using the address of the event register associated with the event.

On each PPI channel, the signals are synchronized to the 16 MHz clock, to avoid any internal violation

of setup and hold timings. As a consequence, events that are synchronous to the 16 MHz clock will be

delayed by one clock period, while other asynchronous events will be delayed by up to one 16 MHz clock

period.

Note that shortcuts (as defined in the SHORTS register in each peripheral) are not affected by this 16 MHz

synchronization, and are therefore not delayed.

Each TEP implements a fork mechanism that enables a second task to be triggered at the same time as the

task specified in the TEP is triggered. This second task is configured in the task end point register in the

FORK registers groups, e.g. FORK.TEP[0] is associated with PPI channel CH[0].

There are two ways of enabling and disabling PPI channels:

• Enable or disable PPI channels individually using the CHEN, CHENSET, and CHENCLR registers.

• Enable or disable PPI channels in PPI channel groups through the groups’ ENABLE and DISABLE tasks.

Prior to these tasks being triggered, the PPI channel group must be configured to define which PPI

channels belong to which groups.

Note that when a channel belongs to two groups m and n, and the tasks CHG[m].EN and CHG[n].DIS occur

simultaneously (m and n can be equal or different), the CHG[m].EN on that channel has priority.

PPI tasks (for example, CHG[0].EN) can be triggered through the PPI like any other task, which means they

can be hooked to a PPI channel as a TEP. One event can trigger multiple tasks by using multiple channels

and one task can be triggered by multiple events in the same way.

6.11.1 Pre-programmed channels

Some of the PPI channels are pre-programmed. These channels cannot be configured by the CPU, but can

be added to groups and enabled and disabled like the general purpose PPI channels. The FORK TEP for

these channels are still programmable and can be used by the application.

For a list of pre-programmed PPI channels, see the table below.

4454_140 v1.0

140

NRF52811-QCAA-R 데이터시트(PDF) 140 Page - Nordic Semiconductor