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CS495303 데이터시트(PDF) 22 Page - Cirrus Logic

부품명 CS495303
상세설명  32-bit Audio Decoder DSP Family with Dual DSP Engine Technology
PDF  38 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS495303 데이터시트(HTML) 22 Page - Cirrus Logic

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CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
22
®Copyright 2008 Cirrus Logic, Inc.
DS705PP2
5.16 Switching Characteristics — UART
Figure 11. UART Timing
Parameter
Symbol
Min
Max
Unit
UART_CLK period1
1. The minimum clock period is limited to DCLKP/32 or the minimum value, whichever is larger.
tuclki
266
-
ns
UART_CLK duty cycle
-
40
60
%
Setup time for UART_RXD
tuckrxsu
5-
Hold time for UART_RXD
tuckrxdv
5-
ns
Delay from CLK transition to TXD transition
tucktxdv
-29
ns
ttxen
??
ns
ttxhz
??
ns
UART_CLK
UART_RXD
UART_TXD
tuckrxsu
tucktxdv
tuckrxdv
UART_TX_EN
ttxen
ttxhz



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