STR730FZ1T7 datasheet(43/52 Pages) STMICROELECTRONICS

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STR73xFxx

Electrical parameters

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4.3.6

10-bit ADC characteristics

Subject to general operating conditions for VDDA, fMCLK, and TA unless otherwise specified.

Unless otherwise specified, typical data are based on TA=25°C and VDDA-VSS=5.0V. They are given only

as design guidelines and are not tested.

Calibration is recommended once after each power-up.

During the sample time the input capacitance CAIN (6.8 max) can be charged/discharged by the external

source. The internal resistance of the analog source must allow the capacitance to reach its final voltage

level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on

the conversion result. Values for the sample clock tS depend on programming.

Table 26.

ADC characteristics

Symbol

Parameter

Conditions

Min

Typ 1)

Max

Unit

fADC

0.4

MHz

VAIN

Conversion voltage range 2)

VSSA

VDDA

Ilkg

Negative input leakage current on

analog pins

VIN<VSS, | IIN |< 400

µA on adjacent

analog pin

μA

CADC

Internal sample and hold

capacitor

3.5

tCAL

Calibration time

fADC = 10 MHz

580.2

µs

5802

1/fADC

Sampling time

fADC = 10 MHz

114

µs

tCONV

Total conversion time (including

sampling time)

fADC = 10 MHz

3µs

30 (10 for sampling

+20 for successive

approximation)

1/fADC

IADC

Running mode

Normal mode

Power-down mode

μA

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