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ST20C4 데이터시트(PDF) 22 Page - STMicroelectronics

부품명 ST20C4
상세설명  Instruction Set Reference Manual
PDF  212 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
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If the process state registers are referred to without subscripts then the current priority
is implied.
3.1.2
Other machine registers
There are several other registers which the programmer should know about, but which
are not part of the process state. These are presented in Table 3.3.
Enables register
The Enables register contains:
• TrapEnables bits (0..15) which can be used to control the taking of traps;
• GlobalInterruptEnables bits (16..31) which are used to control timeslicing and
interruptibility. These are normally set to 1.
Bits of
TrapEnables may be set using the trapenb instruction and cleared using
trapdis. Bits of GlobalInterruptEnables may be set using the instruction gintenb and
disabled using
gintdis.
The contents of the Enables register are shown in Table 3.4.
ClockEnables
ClockEnables is a pair of flags which enab le the timers ClockReg to tick. Bit zero of
ClockEnables controls ClockReg[0] and bit 1 controls ClockReg[1]. In each case,
register
full name / description
ProcQueueFPtr[0]
high priority front pointer register - contains pointer to first process on the high
priority scheduling list
ProcQueueFPtr[1]
low priority front pointer register - contains pointer to first process on the low
priority scheduling list
ProcQueueBPtr[0]
high priority back pointer register - contains pointer to last process on the high
priority scheduling list
ProcQueueBPtr[1]
low priority back pointer register - contains pointer to last process on the low
priority scheduling list
ClockReg[0]
high priority clock register - contains current value of high priority clock
ClockReg[1]
low priority clock register - contains current value of low priority clock
TptrReg[0]
high priority timer list pointer register - contains pointer to the first process on
the high priority timer list
TptrReg[1]
low priority timer list pointer register - contains pointer to the first process on the
low priority timer list
TnextReg[0]
high priority alarm register - contains the time of the first process on the high
priority timer queue
TnextReg[1]
low priority alarm register - contains the time of the first process on the low
priority timer queue
Enables
trap and global interrupt enables register
Table 3.3 Other machine registers



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