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ST5088FN 데이터시트(PDF) 14 Page - STMicroelectronics |
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ST5088FN 데이터시트(HTML) 14 Page - STMicroelectronics |
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14 / 33 page ![]() Table 2: Control Register CR0 Functions 7 6 54 32 10 Function F1 F0 MA IA DN FF B7 DL 0 0 1 1 0 1 0 1 MCLK = 512 kHz MCLK = 1.536 MHz MCLK = 2.048 MHz MCLK = 2.560 MHz * (1) (1) 0 0 1 1 0 1 0 1 MU-law; CCITT D3-D4 MU-law; Bare Coding A-law including even bit inversion A-law; Bare Coding * 0 1 Delayed data timing Non delayed data timing *(1) (1) 0 1 B1 and B2 consecutive B1 and B2 separated *(1) (1) 0 1 8 bits time-slot 7 bits time-slot * 0 1 Normal operation Digital Loop-back * *: state at power on initialization (1): significant in COMBO I/II mode only Table 3: Control Register CR1 Functions 76 543 21 0 Function HFE ALE DO MR MX EN T1 T0 0 1 HFO / HFI pins disabled HFO / HFi pins enabled * 0 1 Anti-larsen disabled Anti-larsen enabled * 0 1 L0 latch is put in high impedance L0 latch set to 0 * 0 1 DR connected to rec. path CR2 connected to rec. path * (1) (1) 0 1 Trans path connected to DX CR3 connected to DX * (1) (1) 0 1 voice data transfer disable voice data transfer enable * 0 0 1 1 0 1 0 1 B1 channel selected B2 channel selected B1* channel selected B2* channel selected * (2) (2) *: state at power on initialization (1): significant in COMBO I / II mode only (2): significant in GCI mode only. ST5088 14/33 |
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