ST92F124 datasheet(423/426 Pages) STMICROELECTRONICS

423 / 426 page

423/426

ST92F124/F150/F250 - KNOWN LIMITATIONS

KNOWN LIMITATIONS (Cont’d)

Here is an example of a patch for the MFT1 using

DMA in ouput compare mode, inserted at the be-

ginning of the MFT0 interrupt routine:

spp #8 ;Set to page 8 (mft1)

tm T_IDMR,#0x08 ;test mft0 OCMP dma

mask bit

jxnz MFT0_it_routine

cpw DMA_CNT1,#0 ;If the DMA count is

not at zero the block did not complete

jxeq MFT0_it_routine

and

T_FLAGR,#11011111b

;Clear

dma

compare interrupt request

or T_IDMR,#0x08 ;Re-enable the com-

pare 0 dma

MFT0_it_routine: ;MFT0 interrupt rou-

tine code

In addition, the peripheral DMA priorities must be

organized so that the MFT DMA priorities are the

highest. This way the impact is limited: DMA re-

quests with the wrong Mask Bit Reset are serv-

iced.

Workaround Limitation

If the counter event period is too short, the failure

recovery in the interrupt routines will not work.

13.2.9 DMA DATA CORRUPTED BY MFT INPUT

CAPTURE

Description

If the MFT requests a DMA transfer following an

input capture event and while a DMA transfer is

currently ongoing to or from another peripheral

(SCI-M, I2C, or second MFT), the DMA data is cor-

rupted (overwritten by the captured data).

Workaround

Avoid using the MFT Input Capture function in

DMA mode while another peripheral is in DMA

mode.

13.2.10 SCI-A WRONG BREAK DURATION

Description

A single break character is sent by setting and re-

setting the SBK bit in the SCICR2 register. In

some cases, the break character may have a

longer duration than expected:

- 20 bits instead of 10 bits if M=0

- 22 bits instead of 11 bits if M=1.

In the same way, as long as the SBK bit is set,

break characters are sent to the TDO pin. This

may lead to generate one break more than ex-

pected.

Occurrence

The occurrence of the problem is random and pro-

portional to the baudrate. With a transmit fre-

qu en cy o f 19 2 0 0 ba ud ( f CP U =8MHz and

SCIBRR=0xC9), the wrong break duration occur-

rence is around 1%.

Workaround

If this wrong duration is not compliant with the

communication protocol in the application, soft-

ware can request that an Idle line be generated

before the break character. In this case, the break

duration is always correct assuming the applica-

tion is not doing anything between the idle and the

break. This can be ensured by temporarily disa-

bling interrupts.

The exact sequence is:

- Disable interrupts

- Reset and Set TE (IDLE request)

- Set and Reset SBK (Break Request)

- Re-enable interrupts

13.2.11 LIN MASTER MODE NOT AVAILABLE

ON SCI-A

LIN Synch Breaks (13 low bits) generation is not

possible on SCI-A. LINE bit has no effect on break

length.

ST92F124 데이터시트(PDF) 423 Page - STMicroelectronics

ST92F124 데이터시트(HTML) 423 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL