전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

ST92F120JR1T 데이터시트(PDF) 299 Page - STMicroelectronics

부품명 ST92F120JR1T
상세설명  8/16-BIT FLASH MCU FAMILY WITH RAM, EEPROM AND J1850 BLPD
PDF  320 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST92F120JR1T 데이터시트(HTML) 299 Page - STMicroelectronics

Back Button ST92F120JR1T Datasheet HTML 295Page - STMicroelectronics ST92F120JR1T Datasheet HTML 296Page - STMicroelectronics ST92F120JR1T Datasheet HTML 297Page - STMicroelectronics ST92F120JR1T Datasheet HTML 298Page - STMicroelectronics ST92F120JR1T Datasheet HTML 299Page - STMicroelectronics ST92F120JR1T Datasheet HTML 300Page - STMicroelectronics ST92F120JR1T Datasheet HTML 301Page - STMicroelectronics ST92F120JR1T Datasheet HTML 302Page - STMicroelectronics ST92F120JR1T Datasheet HTML 303Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 299 / 320 page
background image
299/320
ST92F120 - ELECTRICAL CHARACTERISTICS
RCCU CHARACTERISTICS
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
Note:
(1) Unless otherwise stated, typical data are based on TA=25°C and VDD= 5V. They are only reported for design guide lines not tested in
production.
RCCU TIMING TABLE
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
Note:
(1) Unless otherwise stated, typical data are based on TA=25°C and VDD= 5V. They are only reported for design guide lines not tested in
production.
(2) Depending on the delay between rising edge of RESET pin and the first rising edge of CLOCK1, the value can differ from the typical value
for +/- 1 CLOCK1 cycle.
Legend:Tosc = OSCIN clock periods.
PLL CHARACTERISTICS
(VDD =5V ± 10%, TA = 40°C to +105°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
Note:
(1) Unless otherwise stated, typical data are based on TA=25°C and VDD= 5V. They are only reported for design guide lines not tested in
production.
(2) Measured at 24MHz (INTCLK). Guaranteed by Design Characterisation (not tested).
Legend: Tosc = OSCIN clock periods.
Symbol
Parameter
Comment
Value
Unit
Min
Typ (1)
Max
VIHRS
RESET Input High Level
Input Threshold
3.2
V
Input Voltage Range
VDD + 0.3
V
VILRS
RESET Input Low Level
Input Threshold
2.4
V
Input Voltage Range
– 0.3
VHYRS
RESET Input Hysteresis
800
mV
ILKRS
RESET Pin Input Leakage
0V < VIN <VDD
–1
+ 1
µA
Symbol
Parameter
Comment
Value
Unit
Min
Typ (1)
Max
TFRS
RESET Input Filtered Pulse
50
ns
TNFR
RESET Input Non Filtered
Pulse
20
µs
TRSPH
(2)
RESET Phase duration
20400 x Tosc
µs
TSTR
STOP Restart duration
DIV2 = 0
DIV2 = 1
10200 x Tosc
20400 x Tosc
µs
Symbol
Parameter
Comment
Value
Unit
Min
Typ (1)
Max
FXTL
Crystal Reference Frequency
2
5
MHz
FVCO
VCO Operating Frequency
6
24
MHz
TPLK
Lock-in Time
350 x Tosc
1000 x Tosc
µs
PLL Jitter
0
1200 (2)
ps
1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com