ADP130

Rev. 0 | Page 12 of 20

THEORY OF OPERATION

The ADP130 is a low dropout, linear regulator that uses an

advanced proprietary architecture to achieve low quiescent

current and high efficiency regulation. It also provides high

power supply rejection ratio (PSRR) and excellent line and load

transient response using a small 1 μF ceramic output capacitor. The

device operates from a 2.3 V to 5.5 V bias rail and a 1.2 V to 3.6 V

input rail to provide up to 350 mA of output current. Supply

current in shutdown mode is typically less than 1 μA.

Internally, the ADP130 consists of a reference, an error ampli-

fier, a feedback voltage divider, and a pass device. The output

current is delivered via the pass device, which is controlled by

the error amplifier, forming a negative feedback system that

ideally drives the feedback voltage to equal the reference voltage.

If the feedback voltage is lower than the reference voltage, the

negative feedback drives more current, increasing the output

voltage. If the feedback voltage is higher than the reference voltage,

the negative feedback drives less current, decreasing the output

voltage. The VBIAS pin is the positive supply for all circuitry

except the pass device.

The ADP130 has an internal soft start that limits the output

voltage ramp period to approximately 200 μs. All internal devices

are controlled by the enable pin, EN. When EN is high, the

output is on; when EN is low, the output is off.

SHUTDOWN

VIN

GND

EN

VOUT

VBIAS

R1

R2

SHORT-CIRCUIT,

UVLO, AND

THERMAL

PROTECT

0.5V

REF

Figure 33. Internal Block Diagram

The ADP130 is available in 31 output voltage options, ranging from

0.8 V to 3.0 V. The ADP130 uses the EN pin to enable and disable

the VOUT pin under normal operating conditions. When EN is

high, VOUT turns on. When EN is low, VOUT turns off. For auto-

matic startup, EN can be tied to VBIAS.