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V58C2256 데이터시트(PDF) 13 Page - Mosel Vitelic, Corp |
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V58C2256 데이터시트(HTML) 13 Page - Mosel Vitelic, Corp |
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13 / 61 page ![]() 13 MOSEL VITELIC V58C2256(804/404/164)S V58C2256(804/404/164)S Rev. 1.4 October 2002 Data Strobe Preamble and Postamble Timings for DDR Read Cycles Consecutive Burst Read Operation and Effects on the Data Strobe Preamble and Postamble (CAS Latency = 2; Burst Length = 2) T0 T1 T2 T3 T4 READ NOP NOP NOP D0 D1 CK, CK Command DQS DQ tRPRE(max) tRPST(min) tRPRE(min) tRPST(max) tDQSQ(max) tDQSQ(min) NOP ReadB NOP NOP NOP NOP ReadA D0A D1A NOP D2A D3A Command DQS DQ Burst Read Operation (CAS Latency = 2; Burst Length = 4) CK, CK NOP D0B D1B D2B D3B NOP ReadB NOP NOP NOP NOP ReadA D0A D1A NOP D2A D3A Command DQS DQ Burst Read Operation (CAS Latency = 2; Burst Length = 4) CK, CK NOP D0B D1B D2B D3B |
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