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HT80C51 User Manual
Memory Organization – Memory Map
Handshake Solutions
© Philips Electronics N.V. 2005
Page 9 of 132
2.
Memory Organization
The 80C51 architecture comprises several different and separated address areas. The following chap-
ter describes the map of these memory areas, which are described in more detail thereafter.
2.1.
Memory Map
The 80C51 has separate address spaces for program memory, external and internal data memory.
[Figure 3] shows a map of the 80C51 memory areas.
up to
64 Kbytes
up to
64 Kbytes
up to
256 bytes
internal data
memory
(IDATA, DATA)
external data
memory
(XDATA)
program memory
(CODE)
000H
FFFH
FFH
00H
[Figure 3]
HT80C51 Memory Map
The Program memory (CODE) can be up to 64Kbytes. It can be accessed by instruction fetches and
by the MOVC instruction.
The 80C51 can address up to 64k bytes of external data memory (XDATA). Historically this area was
located outside the chip (hence the name external), which is usually not the case for embedded sys-
tems. The MOVX instruction is used to access the external data memory.
The 80C51 can address up to 256 bytes of on-chip RAM, plus a number of Special Function Registers
(SFRs).
The lower 128 bytes of RAM can be accessed either by direct addressing (MOV data addr) or by indi-
rect addressing (MOV @Ri). The upper 128 bytes of RAM can be accessed by indirect addressing
only. Using addresses 80H to FFH with direct addressing accesses the special function registers.
[Figure 4] shows the internal data memory organization.
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