STLC5048 datasheet(21/45 Pages) STMICROELECTRONICS

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STLC5048

Loopback Register (LOOPB)

Addr=2Ah; Reset Value=00h

DL3..0=0: Normal Operation

DL3..0=1: Codec #3..0 is set in Digital Loopback mode, this means that the receive PCM signal applied to the

programmed Receive Time Slot is transferred to the programmed Transmit Time Slot.

AL3..0=0: Normal Operation

AL3..0=1: Codec #3..0 is set in Analog Loopback mode, this means that the VFRO signal is transferred to the

VFXI input internally into the Codec.

When loopbacks are enabled the signal appears also at the corresponding VFRO output. It is possible to have

no signal on the VFRO output programming the GRX command to 00h in case of digital loopback.

Transmit Preamplifier Gain Register (TXG)

Addr=2Bh; Reset Value=00h

TG3..0=0: Transmit preamplifier gain ch. 3..0 = 0dB

TG3..0=1: Transmit preamplifier gain ch. 3..0 = 3.52dB

Overall transmit gain depends on combination of TXG and GTXn registers.

Receive Amplifier Gain Register (RXG)

Addr=2Ch; Reset Value=00h

Rn0=0,Rn1=0: Receive amp. gain ch #n = mute

Rn0=1,Rn1=0: Receive amp. gain ch #n = -12dB

Rn0=0,Rn1=1: Receive amp. gain ch #n = -6dB

Rn0=1,Rn1=1: Receive amp. gain ch #n = 0dB

Overall receive gain depends on the receive amplifier gain (R3..0) setting in RXG reg. and digital gain (GRXn

reg. setting).

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

R/W

011010

DL3

DL2

DL1

DL0

AL3

AL2

AL11

AL0

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

R/W

101011

TG3

TG2

TG1

TG0

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

R/W

101100

R31

R30

R21

R20

R11

R10

R01

R00

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