| 전자부품 데이터시트 검색엔진 |
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L9380 데이터시트(PDF) 10 Page - STMicroelectronics |
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L9380 데이터시트(HTML) 10 Page - STMicroelectronics |
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10 / 18 page ![]() Functional description L9380 10/18 In application which don’t use the overload protection or if one channel is not used, the Timer pin of this channel must be connected to ground and the drain pin with a resistor to Vbat. The timing characteristic illustrates the function and the meaning of VDSmin and Toff (see Figure 6). The input current of the overload sense comparator is specified as ISmax. The sum IPR + IDmax generates a drop across the external resistor RD if the drain pin voltage is higher than the source pin (see Figure 4). In the switching point the comparator input source pin currents are equal and the half of the specified current ISmax. For an offset compensation equal external resistors (RD = RS) at drain and source pin are imperative. The drain sense comparator, which detects the overload, has a symmetrical hysteresis of 20 mV (see Figure 5). Exceeding the source pin voltage by 10 mV with respect to the drain voltage forces the timer capacitor to discharge. Decreasing the source pin voltage 10 mV lower than the drain pin voltage an overload of the external MOS is detected and the timer capacitor will be loaded. After reaching a voltage at pin CT higher than the timer threshold VThi the influenced channel is switched off. In this case the overload is stored in the timer capacitor. The timer capacitor will be discharged with a ’High’ signal at the input (see Figure 3). After reaching the lower timer threshold VTLo the overload protection is reset and the channel is able to switch on again. Figure 3. Timing characteristic Figure 4. Drain, source input current. VIN VG VS VT 4.4V 0.4V VDSmin td td Toff D98AT392 ID IPR + IDmax ISmax IS V S = V D IPR 0 D98AT393 |
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