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TDA7402 데이터시트(PDF) 38 Page - STMicroelectronics |
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TDA7402 데이터시트(HTML) 38 Page - STMicroelectronics |
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38 / 71 page ![]() Stereo decoder part TDA7402 38/71 Figure 24. Vn timing diagram Figure 25. Trigger threshold vs. VPEAK Figure 26. Deviation controlled trigger adjustment Figure 27. Field strength controlled trigger adjustment Tim e V in T R T HIGH T F V op DC VTH MIN . TR IG . T H RE S H O L D N O ISE CO NT R O L LE D T R IG . THRE S H O L D 1.5 V 0.9 V 260m V (00) 220m V (01) 18 0 m V (1 0) 14 0 m V (1 1) 8 ST EPS 65 m V 30 m V V PEAK [V] 0.9 DEV IA TIO N [KHz] 2.8 2.0 1.2 20 3 2 .5 45 75 VPEAK 00 01 10 D etector o ff (11) [V ] OP 0.9V noisy signal good signal NOISE 2.3V (00) MONO STEREO 1.8V (01) 1.3V (10) ATC_SB OFF (11) E' VPEAK » 3V |
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