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PM6670AS 데이터시트(PDF) 23 Page - STMicroelectronics |
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PM6670AS 데이터시트(HTML) 23 Page - STMicroelectronics |
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23 / 54 page ![]() PM6670AS Device description 23/54 7.1.2 Output ripple compensation and loop stability The loop is closed connecting the center tap of the output divider (internally, when the fixed output voltage is chosen, or externally, using the MODE pin in the adjustable output voltage mode). The feedback node is the negative input of the error comparator, while the positive input is internally connected to the reference voltage (Vr = 0.9 V). When the feedback voltage becomes lower than the reference voltage, the PWM comparator goes to high and sets the control logic, turning on the high-side MOSFET. After the On-Time (calculated as previously described) the system releases the high-side MOSFET and turns on the synchronous rectifier. The voltage drop along ground and supply PCB paths, used to connect the output capacitor to the load, is a source of DC error. Furthermore the system regulates the output voltage valley, not the average, as shown in Figure 26. Thus, the voltage ripple on the output capacitor is an additional source of DC error. To compensate this error, an integrative network is introduced in the control loop, by connecting the output voltage to the COMP pin through a capacitor (CINT) as shown in Figure 29. Figure 28. Switching section simplified block diagram + - HS HS driver driver Level Level shifter shifter LS LS driver driver Q Q R S Ton Ton--min min Anti cross- conduction circuitry Toff Toff--min min Q R S + - PWM Comparator PWM Comparator Positive Current Limit comparator Positive Current Limit comparator 0.9V 0.9V Q Q R S + _ Min Min fsw fsw counter counter Zero Zero--crossing crossing Comparator Comparator bandgap bandgap 1.236V 1.236V PHASE PHASE PGND PGND LGATE LGATE BOOT BOOT CSNS CSNS COMP COMP gm gm Integrator Integrator VSNS VSNS VBG VBG VBG VBG PULSE PULSE -- SKIP SKIP MODE MODE MODE<4V 1-Shot generator Ton Ton VSNS VSNS VOSC VOSC DDRSEL 0.9V 0.9V 100uA 100uA 500mV 2.5V 2.5V + - - - + + HGATE HGATE VREF VREF SGND SGND VOSC VOSC VOSC VOSC VCC VCC |
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