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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PM6670AS 데이터시트(PDF) 49 Page - STMicroelectronics |
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PM6670AS 데이터시트(HTML) 49 Page - STMicroelectronics |
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49 / 54 page  PM6670AS Application information 49/54 If the ripple on pin COMP is greater than the integrator output dynamic (150 mV), an additional capacitor Cfilt could be added in order to reduce its amplitude. If q is the desired attenuation factor of the output ripple, select: Equation 50 In order to reduce noise on pin COMP, it's possible to introduce a resistor RINT that, together with CINT and Cfilt, becomes a low psas filter. The cutoff frequency fCUT must be much greater (10 or more times) than the switching frequency of the section: Equation 51 For most of applications both RINT and Cfilt are unnecessary. If the ripple is very small (e.g. such as with ceramic capacitors), an additional compensation network, called "Virtual ESR" network, is needed. This additional part generates a triangular ripple that substitutes the ESR output voltage ripple. The complete compensation scheme is represented in Figure 41. Figure 41. Virtual ESR network q ) q 1 ( C C INT filt − ⋅ = FILT INT FILT INT CUT INT C C C C f 2 1 R + ⋅ ⋅ π = VREF CFILT CINT RINT PWM Comparator gm + - + - 0.9V VDDQ Ton Generation Block C R R1 L Integrator |
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