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PM6681ATR 데이터시트(PDF) 28 Page - STMicroelectronics |
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PM6681ATR 데이터시트(HTML) 28 Page - STMicroelectronics |
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28 / 47 page ![]() Device description PM6681A 28/47 7.10 Power up sequencing and operative modes Let ’s consider SHDN, EN1 and EN2 low at the beginning. The battery voltage is applied as input voltage. The device is in shutdown mode. When the SHDN pin voltage is above the shutdown device on threshold (1.5 V typ.), the controller begins the power-up sequence. All the latched faults are cleared. LDO5 undervoltage control is blanked for 4 ms and the internal regulator LDO5 turns on. If the LDO5 output is above the UVLO threshold after this time, the device enters in standby mode and the adjustable internal linear regulator LDO is turned on. The switching outputs are kept to ground by turning on the low side MOSFETs. When EN1 and EN2 pins are forced high the switching sections begin their soft-start sequence. Table 9. Operative modes Mode Conditions Description Run SHDN is high, EN1/EN2 pins are high Switching regulators are enabled; internal linear regulators outputs are enabled. Standby Both EN1/EN2 pins are low and SHDN pin is high Internal linear regulators active (LDO5 is always on). In Standby mode LGATE1/LGATE2 pins are forced high while HGATE1/HGATE2 pins are forced low. Shutdown SHDN is low All circuits off. |
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