STA335BWS datasheet(61/68 Pages) STMICROELECTRONICS

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STA335BWS

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6.17

EQ coefficients and DRC configuration register (addr 0x31)

AC0, AC1, AC2 settings are designed for loudspeaker protection function, limiting at the

minimum any audio artefact introduced by typical anti-clipping/DRC algorithms. More

detailed information can be retrieved in the “Configurable output power rate using

STA335BW” and “STA335BWS vs STA335BW” application notes.

Bit XOB can be used to bypass the crossover filters. Logic 1 means that the function is not

active. In this case, high pass crossover filter works as a pass through on the data path

(b0 = 1, all the other coefficients at logic 0) while the low pass filter is configured to have

zero signal on channel 3 data processing (all the coefficients are at logic 0).

XOB

Reserved

AMGC[3]

AMGC[2]

reserved

SEL1

SEL0

000

Table 32.

SEL bitfield description

SEL[1,0]

EQ RAM bank selected

00/11

Bank 0 activated

Bank 1 activated

Bank 2 activated

Table 33.

AMGC bitfield description

AMGC[3,2]

Anti-clipping and DRC preset selected

DRC/Anti-clipping (default)

DRC/Anti-clipping

10/11

Reserved, do not use

Table 34.

AMGC bitfield description

AMGC[1:0]

Mode

AC0, stereo anti-clipping 0dB limiter

AC1, stereo anti-clipping +1.25dB limiter

AC2, stereo anti-clipping +2dB limiter

reserved do not use

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