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L6756DTR 데이터시트(PDF) 21 Page - STMicroelectronics

부품명 L6756DTR
상세설명  2/3/4 phase buck controller for VR10, VR11 and VR11.1 processor applications
PDF  36 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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L6756DTR 데이터시트(HTML) 21 Page - STMicroelectronics

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L6756D
Output voltage positioning
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5.2
Current reading and current sharing loop
L6756D embeds a flexible, fully-differential current sense circuitry that is able to read across
inductor parasitic resistance or across a sense resistor placed in series to the inductor ele-
ment. The fully-differential current reading rejects noise and allows placing sensing element
in different locations without affecting the measurement's accuracy. The trans-conductance
ratio is issued by the external resistor RG placed outside the chip between CSxN pin toward
the reading points. The current sense circuit always tracks the current information, the pin
CSx is used as a reference keeping the CSxN pin to this voltage. To correctly reproduce the
inductor current an R-C filtering network must be introduced in parallel to the sensing ele-
ment. The current that flows from the CSxN pin is then given by the following equation (See
Figure 7):
Considering now to match the time constant between the inductor and the R-C filter applied
(Time constant mismatches cause the introduction of poles into the current reading network
causing instability. In addition, it is also important for the load transient response and to let
the system show resistive equivalent output impedance) it results:
RG resistor is tipical designed in order to have an information current IINFOx in the range of
35
μA at the OC Threshold.
The current read through the CSx / CSxN pairs is converted into a current IINFOx propor-
tional to the current delivered by each phase and the information about the average current
IAVG = ΣIINFOx / N is internally built into the device (N is the number of working phases). The
error between the read current IINFOx and the reference IAVG is then converted into a voltage
that with a proper gain is used to adjust the duty cycle whose dominant value is set by the
voltage error amplifier in order to equalize the current carried by each phase.
Figure 7.
Current reading connections
I
CSx-
DCR
R
G
-------------
1
s L DCR
⁄
⋅
+
1s R C
⋅⋅
+
-------------------------------------- I
⋅
PHASEx
⋅
=
L
R
L
-------
RC
I
CSxN
R
L
Rg
-------- I
PHASEx
⋅
=
⇒
⋅
I
INFOx
==



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