| 전자부품 데이터시트 검색엔진 |
|
MSC8112 데이터시트(PDF) 17 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MSC8112 데이터시트(HTML) 17 Page - Freescale Semiconductor, Inc |
|
17 / 44 page ![]() Electrical Characteristics MSC8112 Dual Core Digital Signal Processor Data Sheet, Rev. 0 Freescale Semiconductor 17 In all cases, the power-up sequence must follow the guidelines shown in Figure 8. The following rules apply: 1. During time interval A, VDDH should always be equal to or less than the VDD/VCCSYN voltage level. The duration of interval A should be kept below 10 ms. 2. The duration of timing interval B should be kept as small as possible and less than 10 ms. Figure 7. Start-Up Sequence: VDD Raised Before VDDH with CLKIN Started with VDDH Figure 8. Power-Up Sequence for VDDH and VDD/VCCSYN Time o.5 V 3.3 V 1.1 V VDDH Nominal PORESET/TRST asserted VDD Nominal CLKIN starts toggling VDD applied PORESET/TRST deasserted 1 VDDH applied VDDH = Nominal VDD = Nominal 3.3 V 1.2 V A B VDD/VCCSYN VDDH (IO) t (time) V |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |