 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
M16C/29 데이터시트(PDF) 299 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
M16C/29 데이터시트(HTML) 299 Page - Renesas Technology Corp |
|
|
299 / 499 page  16. MULTI-MASTER I2C bus INTERFACE p u o r G 9 2 / C 6 1 M page 275 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R 16.7 I2C0 Control Register 2 (S4D0 Register) The S4D0 register controls the error communication detection. If the SCL clock is stopped counting dring data transfer, each device is stopped, staying online. To avoid the situation, the I2C bus interface circuit has a function to detect the time-out when the SCL clock is stopped in high-level ("H") state for a specific period, and to generate an I2C bus interface interrupt request. See Figure 16.13. Figure 16.13 The timing of time-out detection 1 clock 1 bit SCL SDA BB flag Internal counter start signal Internal counter stop, reset signal Internal counter overflow signal I2C-bus interface interrupt request signal 2 bit 3 bit 2 clock 3 clock SCL clock stop (“H”) The time of timeout detection |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
