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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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M32C/8A 데이터시트(PDF) 244 Page - Renesas Technology Corp |
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M32C/8A 데이터시트(HTML) 244 Page - Renesas Technology Corp |
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244 / 372 page  M32C/8A Group 17. Serial Interfaces Rev.1.00 Jul 15, 2007 Page 227 of 352 REJ09B0385-0100 Table 17.8 Register Settings in I2C Mode (2) i = 0 to 4 Register Bit Setting Value Master Slave UiC0 CLK1, CLK0 Select the count source of the UiBRG register Disabled CRS Disabled because the CRD bit is set to 1 TXEPT Transmit shift register empty flag CRD, NCH Set to 1 CKPOL Set to 0 UFORM Set to 1 UiC1 TE Set to 1 to enable transmit operation TI UiTB register empty flag RE Set to 1 to enable receive operation RI Receive operation complete flag UiLCH, UiERE Set to 0 UiBRG 7 to 0 Set baud rate Disabled IFSR IFSR7, IFSR6 Select the UARTi interrupt source UiTB 7 to 0 Set transmit data UiRB 7 to 0 Receive data can be read 8 ACK or NACK is received ABT Arbitration lost detect flag Disabled OER Overrun error flag |
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