H8S2245 datasheet(141/818 Pages) RENESAS

141 / 818 page

Section 4 Exception Handling

Rev.3.00 Mar. 26, 2007 Page 99 of 772

REJ09B0355-0300

4.3

Interrupts

Interrupt exception handling can be requested by nine external sources (NMI, IRQ7 to IRQ0) and

34 internal sources in the on-chip supporting modules. Figure 4.4 classifies the interrupt sources

and the number of interrupts of each type.

The on-chip supporting modules that can request interrupts include the watchdog timer (WDT),

16-bit timer-pulse unit (TPU), 8-bit timer, serial communication interface (SCI), data transfer

controller (DTC), and A/D converter. Each interrupt source has a separate vector address.

NMI is the highest-priority interrupt. Interrupts are controlled by the interrupt controller. The

interrupt controller has two interrupt control modes and can assign interrupts other than NMI to

three priority/mask levels to enable multiplexed interrupt control.

For details of interrupts, see section 5, Interrupt Controller.

Interrupts

External

interrupts

Internal

interrupts

NMI (1)

IRQ7 to IRQ0 (8)

WDT* (1)

TPU (13)

8-bit timer (6)

SCI (12)

DTC (1)

A/D converter (1)

Numbers in parentheses are the numbers of interrupt sources.

* When the watchdog timer is used as an interval timer, it generates

an interrupt request at each counter overflow.

Notes:

Figure 4.4 Interrupt Sources and Number of Interrupts

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