H8S2245 datasheet(171/818 Pages) RENESAS

171 / 818 page

Section 5 Interrupt Controller

Rev.3.00 Mar. 26, 2007 Page 129 of 772

REJ09B0355-0300

5.6.2

Block Diagram

Figure 5.10 shows a block diagram of the DTC and interrupt controller.

Selection

circuit

DTCER

DTVECR

Control logic

CPU

DTC

DTC activation

request vector

number

Clear signal

CPU interrupt

request vector

number

Select

signal

Interrupt

request

Interrupt source

clear signal

IRQ

interrupt

On-chip

supporting

module

Clear signal

Interrupt controller

I, UI

SWDTE

clear signal

Determination of

priority

Figure 5.10 Interrupt Control for DTC

5.6.3

Operation

The interrupt controller has three main functions in DTC control.

(1) Selection of Interrupt Source

Interrupt sources can be specified as DTC activation requests or CPU interrupt requests by means

of the DTCE bit of DTCEA to DTCEF in the DTC.

After a DTC data transfer, the DTCE bit can be cleared to 0 and an interrupt request sent to the

CPU in accordance with the specification of the DISEL bit of MRB in the DTC.

When the DTC has performed the specified number of data transfers and the transfer counter value

is zero, the DTCE bit is cleared to 0 and an interrupt request is sent to the CPU after the DTC data

transfer.

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