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H8S2245 데이터시트(PDF) 236 Page - Renesas Technology Corp |
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H8S2245 데이터시트(HTML) 236 Page - Renesas Technology Corp |
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236 / 818 page ![]() Section 7 Data Transfer Controller Rev.3.00 Mar. 26, 2007 Page 194 of 772 REJ09B0355-0300 7.3.4 Location of Register Information in Address Space Figure 7.5 shows how the register information should be located in the address space. Locate the MRA, SAR, MRB, DAR, CRA, and CRB registers, in that order, from the start address of the register information (contents of the vector address). In the case of chain transfer, register information should be located in consecutive areas. Locate the register information in the on-chip RAM (addresses: H'FFF800 to H'FFFBFF). Lower address 01 23 MRA SAR DAR MRB CRA CRB MRA SAR DAR MRB CRA CRB Register information Register information for 2nd transfer in chain transfer Register information start address Chain transfer 4 bytes Figure 7.5 Location of DTC Register Information in Address Space |
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