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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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HD64F2149YV 데이터시트(PDF) 375 Page - Renesas Technology Corp |
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HD64F2149YV 데이터시트(HTML) 375 Page - Renesas Technology Corp |
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375 / 1075 page  Section 12 8-Bit Timers Rev. 3.00 Jan 18, 2006 page 347 of 1044 REJ09B0280-0300 12.1.2 Block Diagram Figure 12.1 shows a block diagram of the 8-bit timer module (TMR0 and TMR1). TMRX and TMRY have a similar configuration, but cannot be cascaded. TMRX also has an input capture function. For details, see section 13, Timer Connection. External clock sources Internal clock sources TMR0 φ/8, φ/2 φ/64, φ/32 φ/1024, φ/256 Clock 1 Clock 0 Compare-match A1 Compare-match A0 Clear 1 CMIA0 CMIB0 OVI0 CMIA1 CMIB1 OVI1 Interrupt signals TMO0 TMRI0 TCORA0 Comparator A0 Comparator B0 TCORB0 TCSR0 TCR0 TCORA1 Comparator A1 TCNT1 Comparator B1 TCORB1 TCSR1 TCR1 TMCI0 TMCI1 TCNT0 Overflow 1 Overflow 0 Compare-match B1 Compare-match B0 TMO1 TMRI1 Clock select Control logic Clear 0 TMR1 φ/8, φ/2 φ/64, φ/128 φ/1024, φ/2048 TMRX φ φ/2 φ/4 TMRY φ/4 φ/256 φ/2048 Figure 12.1 Block Diagram of 8-Bit Timer Module |
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