HD64F2149YV datasheet(83/1075 Pages) RENESAS

83 / 1075 page

Section 2 CPU

Rev. 3.00 Jan 18, 2006 page 55 of 1044

REJ09B0280-0300

Type

Instruction

Size*

Function

Logic

operations

AND

B/W/L

∧ Rs → Rd, Rd ∧ #IMM → Rd

Performs a logical AND operation on a general register

and another general register or immediate data.

B/W/L

∨ Rs → Rd, Rd ∨ #IMM → Rd

Performs a logical OR operation on a general register

and another general register or immediate data.

XOR

B/W/L

⊕ Rs → Rd, Rd ⊕ #IMM → Rd

Performs a logical exclusive OR operation on a general

NOT

B/W/L

¬ (Rd)

→ (Rd)

Takes the one's complement (logical complement) of

general register contents.

Shift

operations

SHAL

SHAR

B/W/L

Rd (shift)

→ Rd

Performs an arithmetic shift on general register contents.

A 1-bit or 2-bit shift is possible.

SHLL

SHLR

B/W/L

Rd (shift)

→ Rd

Performs a logical shift on general register contents.

A 1-bit or 2-bit shift is possible.

ROTL

ROTR

B/W/L

Rd (rotate)

→ Rd

Rotates general register contents.

1-bit or 2-bit rotation is possible.

ROTXL

ROTXR

B/W/L

Rd (rotate)

→ Rd

Rotates general register contents through the carry flag.

1-bit or 2-bit rotation is possible.

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